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This model is close to what you are doing

www.comsol.com/showroom/documentation/model/2192/

Your model needs an airbox surrounding the structure.

This is done under ver35a. IT will open in 4.2a but it is not clean. By clean I mean that when you open it ver35a does not translate super great into ver42a. It will at least get you going.

You will be able to extract s-parameters but RLGC values are a different matter. comsol does not pull spice equivalent models.

Thanks Dennis for the link. However, when I try to download the example, it asks for a license file... because our school uses a network license on the work stations (probably configured by the network admin), I don't think I have access to that.

Do you know if there's anything else I could look at?

Thanks again

If you can't open a file, this will be difficult then. A couple things to check out below that may lead you along but are not direct solutions to your problem. You can download the pdf tutorials and that should help.

www.comsol.com/showroom/gallery/12099/

www.comsol.com/showroom/gallery/11727/

Actually just look at the models for the RF module. Some are applicable and may provide enough hints to get done what you need done. Not necessarily an easy road when you are a newbie.

I don't have your file opened right now but from what I remember you need to surround the structure with an airbox. You only need two ports because the structure looked like microstrip. The ports can be the uniform variety. There are no grounds in RF so you with have to make sure you have return paths as either PECs or similar. Also mesh your ports fine enough when doing s-parameters.

Thanks Dennis. I got it working now! I think. Frequency domain simulation went by without a hitch, defined the 2 ports as you said with an air block surrounding the structure, etc. Now I just need to get the s matrix out somehow :) Looked through the available options in the results section, but have no idea which one to click. I simulated from 1GHz to 10 GHz at 1GHz intervals, so there should be ten solutions. Any idea? Thanks again! You've been a life saver.

Your new file is not correct. Look at the example links again that I supplied above. You can pretty much take their ideas and implement them here. The branch line coupler file is very close to what you need to do.

I see that in the examples supplied, the conductive portions are metalized surfaces on the dielectric as opposed to a strip with a physical thickness. Does this mean the result will not take into account the resistive nature of a real conductor?

Thanks

For internal traces like what you see in those examples, no. Check the documentation under impedance boundary conditions. What it says is that you cannot select the internal trace with properties like copper, aluminum, etc. You can select external traces/boundaries but that does not really help you here. At least this is how ver42a behaves right now. You can try and add in an IBC condition by right clicking the emw intfc, select the trace you want to use in the IBC but I bet you will select the boundary and it will not populate the IBC window.

I would like to backtrack on my comments about internal traces . It is possible to do. I contacted support for a related question and they showed me the way around as a result of that discussion. I have a file attached that shows the concept but let me just state that there are errors with the simulation. The mesh and geometry are not optimal. It will be up to you to take the important stuff and run with it. One of the keys to analyzing PCB type traces is to have a certain thickness to the trace you are trying to simulate in order to apply an impedance boundary condition. At really high freqs, the skin depth is so small that it may not be worth the effort to do all of the prep. Meshing thin objects can be a challenge. I would tell you to approach with caution. In reality all PCB traces do have a finite thickness to them. For example If you have a board with 0.5oz thick of copper (which is about 0.7mils = 0.02mm thick) on the top side for a microstrip topology and the PCB is 62mils thick, you have a 62mil/0.7mil = 88.57 aspect ratio. While not a horrible aspect ratio, the effort to setup the mesh/problem may not be worth. You will have to answer that yourself.